When discussing the ever-changing flash landscape, it is important to first understand the different architectures present in the storage marketplace. At a high level, you can break these architectures into two main categories: server-side and array-based.

Server-side

The major benefit of implementing a server-side flash architecture is the ability to use your current infrastructure while also decreasing latency to where you have the possibility of measuring the response time in the low micro-seconds.

Two common segments of server-side flash are PCI-e and DIMM, both of which are designed with the goal of being installed as close to the server processor as possible. While DIMM is physically installed closer to the server processor, which results in lower latency metrics than PCI-e, it also has the downside of having to make BIOS level changes to determine if the servers DIMM modules will be used traditionally or for server-side flash.

Array-based

Array-based flash storage is identical to your traditional spinning-disks arrays with the added addition of Solid State Drives (SSDs). The major categories of array-based flash, all-flash and hybrid are defined by the manor in which the SSDs integrate with the array. All-flash arrays are comprised of entire shelves of SSDs and can be described as pure performance. Due to the cost of SSDs, which is continually decreasing, all-flash arrays can run into capacity constraints and are often considered when cost per Gb is not a major factor in the buying process.

Flash Memory Cell Types

Now that we have taken a look at the high-level architecture of flash, let’s dive into flash itself, which is categorized as NAND-based storage. Originally developed by Toshiba in 1988, NAND flash memory is non-volatile and has a finite number of write cycles. In order to quantify the number of write cycles, NAND storage can be divided into three separate categories:

  • Single Level Cell (SLC)
  • Multi-Level Cell (MLC)
    • Enterprise Multi-Level (eMLC)
    • Consumer MLC (cMLC)
  • Triple Level Cell (TLC)

Each category differentiates itself from the others by the number of erase cycles it will handle throughout its life, its capacity and the overall cost of the solution. SLC, the most expensive of the cell types, can handle 100K erase cycles throughout its lifetime but sacrifices capacity for its longer life. The next tier, MLC, which has a higher capacity than SLC, will only handle between 3K and 30K erase cycles. This broad range occurs due to the higher tolerances built into eMLC which results in an increased number of write cycles. Finally, we have TLC, which was developed to specifically address capacity concerns. Due to its high capacity, TLC only has 1K erase cycles in its life.

Writing to Flash

Since each cell must be erased before it can be populated with new data, which results in a finite lifespan, several techniques have been developed to extend the life of flash. Before diving into those techniques, let’s go into what exactly occurs when writing new data to flash. First off, the flash medium is composed of pages and erase units. Each erase unit, which are commonly referred to as erase blocks, are composed of 32 to 128 continuous pages that range in size from 8 kilobytes to 512 bytes. When the write process is started, the following steps occur:

  1. The active erase block pages are copied to a buffer (DRAM)
  2. The erase block is erased
  3. The buffer contents are written back with previous data as well as new data to any eligible erase blocks

To prevent the same pages from being continuously written to, wear leveling, which can be either dynamic or static, is deployed to randomize the write process and has been a large factor in the enterprise adoption of flash.

Dynamic, which occurs during normal operations, will assign data to a page that has not been heavily used while static will move the contents of cold erase blocks to more worn erase blocks in the background. Another aspect of static wear leveling is garbage collection which can consolidate pages by moving pages from multiple blocks to new blocks to avoid the erase before write process.

Additionally, over-provisioning is a common technique deployed to extend the life of flash. This occurs when device vendors include more storage capacity than what is actually advertised, which results in more real estate room for the write process.